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1/24 AN1523 application note march 2002 introduction low power smps are today very popular in consumer applications for example like low-cost cable, terrestrial decoders or high end tv chassis and the manufacturers need to design circuits with good performance, small size with high cost effectiveness. an integrated monolithic solution controlling the smps like the l6590 makes it a very suitable device, able to satisfy all the requirements of a compact and flexible solution, integrating all the necessary functions to obtain a robust design just adding few external components. in this proposed reference design, the board is thru-hole technology, without any heat sink. a specific application circuit fully tested is pro- posed and the test results, including thermal and emi, are enclosed in this document. the transformer data are included too, making it a good way to achieve a very short time to market solution. smps main characteristics l input and output voltages: l stand by: during the stand-by operation the power consumption from the mains has to be 1w, when the circuit delivers 50ma from the 5v output and the 12v is unloaded. l protections: overload ad short circuit on both outputs, with auto-restart at short removal. an ovp circuit for open- loop protection. l safety: in acc. with en60065, creepage and clearance minimum distance is 4.8mm l emi: in acc. with en50022 class b input voltage: output voltages at full load: vout iout pout stability vin: 90 264 vrms [v] [a] [w] f: 45 66 hz 5 1.4 7.5 2% 12 0.3 3.6 5% p out (w) = 11.1 by claudio spini 11w flyback converter for auxiliary power supply application using the l6590 this document describes an 11w switch mode power supply reference design, dedicated to consumer applications, e.g. tv chassis auxiliary power supply, low cost set-top box or digital equipment. the board accepts full range input voltage (90 to 265vrms) and delivers 2 output voltages. it is based on the monolithic controller l6590, integrating the controller and a powermos and working at fixed frequen- cy, pwm mode and including a stand-by function to minimize the power consumption during light load operation. it incorporates also all the protections, offering a complete and very compact solution for low power smps.
AN1523 application note 2/24 electrical diagram the smps topology is the standard fly-back, working in continuous mode at low input voltage. core of this smps is the l6590, a monolithic device integrating the controller and a 700v mosfet, available in minidip or so-16 popular packages. in this design, the minidip has been used. the switching frequency is fixed by an internal oscillator at 65khz during normal operation. when a light load is detected, the oscillator switches auto- matically to 22khz, thus increasing the stand-by performance of the circuit. at start-up, the l6590 is activated by an internal current source that draws current from the dc bus and charges the capacitor c2. thanks to this circuit, the wake-up time is shorter than the conventional resistor solution and independent from the input mains voltage. the current source is internally disconnected after that the vcc voltage has reached the vccon value, to prevent power dissipation during light load operation. during normal operation, the device is powered by the transformer, via the diode d3. the network q1, q2, c6, r9, r10, r11 improves the circuit performance during faults. the components c3 and r2 belong to the feedback loop. the power dissipation of the l6590 is ensured by a copper area on the bottom side of the printed circuit board. the transformer is a layer type, using triple insulation wire for the secondary windings, manufactured by el- dor in accordance with the en60065. the transformer reflected voltage is ~105v and the ferrite core size is a small, standard e20. the transil d1 and the diode d2 clamp the peak of the leakage inductance voltage spike at a safe level for the operation of the l6590, providing enough room for the leakage inductance voltage spike with still margin for reliability. the output rectifiers have been chosen in accordance with the maximum reverse voltage and their power dis- sipation. standard, low-cost, axial, fast recovery rectifiers have been selected in order to avoid transformer frac- tional number of turns and to obtain the output voltage values as close as possible to the nominal ones. of course, using high-voltage schottky rectifier the efficiency at full load would be higher but the cost and the out- put voltage precision would be adversely affected. a small lc filter has been added on the +5v in order to filter the high frequency ripple without increasing the output capacitors size. d5 byw100-200 c7 1000uf-25vyxf c4 2n2-2kv(y1) c5 100n-250vacx2 c1 22uf-400v d3 1n4148 c2 22uf-25v 3 2 14 l1 2*27mhb82731 t1 2362.0019rev. c r3 560r r4 2k4-1% r6 2k4-1% ic2 tl431acz c9 100nf c11 470uf-25vyxf jp1 12v @0.3a 5v @1.4a r1 12r d4 byw98-200 c3 2n2 1 2 4 3 opt1 pc817 vin: 88-265 vrms d2 stta106 c8 220uf-10v-zl l2 4u7 r8 2k7 r2 6k8 1 2 3 45 6 7 8 gnd 1 2 3 4 d6 df04g d1 bzw06-188 gnd 7 comp 4 gnd 8 vcc 3 drain 1 vfb 5 gnd 6 ic1 l6590_minidip q1 bc548 q2 bc548 r9 1k0 r10 33k r11 10k c6 2u2-50v r5 1k0 c10 330pf r7 560r r12 ntc_10r f1 fuse1 r13 4k7
3/24 AN1523 application note the output voltage regulation is performed by the secondary feedback on the 5v output. the feedback network is the typical using a tl431 driving an optocoupler, in this case a pc817, and insuring the insulation required by the safety regulation between primary and secondary. the opto-transistor drives directly the comp pin of the l6590 modulating the pwm internal block of the l6590. the stability of the 12v is guaranteed by the trans- former coupling. the input emi filter is a classical lc-filter, 1-cell for differential and common mode noise. a ntc has been in- serted in series with the bulk capacitor to prevent very high peak current at plug insertion, while a standard 5*20 fuse protects in case of catastrophic failures. the pcb type is single layer, fr-4, 2 oz (70 m m) thickness. the l6590 power dissipation is ensured by a copper area of 4 cm2 connected to primary return. here following some waveforms during the normal operation at full load are depicted: the pictures of figure 1 and 2 show the drain voltage and current at the peak of the nominal input mains voltage during normal operation at full load. the circuit works in continuous mode for the effect of the voltage ripple across the input bulk capacitor at 115v while it goes in a depth discontinuous mode at 220v. here are captured the trace at the peak of the input voltage sine wave. figure 3 gives the measurement of the drain peak voltage at full load and maximum input mains voltage. the voltage peak, which is 604v, guarantees a reliable operation of the l6590 thanks to a good margin against the maximum bvdss of the device, which is 700v. hence, a derating of 86% is achieved in the worst mains line condition. the maximum piv of the diodes (on figure 4) has been measured during the worst operating condi- tion at 265vac and it is indicated on the right of each picture. the margin, with respect to the maximum voltage sustained by the diodes, assures a safe operating condition for the devices, contributing to obtain a high mtbf of the circuit, using the mil-hdbk217 calculation method. in figure 5 and 6 the most salient controller ic signals are represented. in both pictures, it is possible to distin- guish clean waveforms free of hard spikes or noise that could affect the controller correct operation figure 1. vds & id @full load figure 2. vds & id @full load vin = 115 vrms - 50 hz vin = 220 vrms - 50 hz ch1: v pin1 drain voltage ch1: v pin1 drain voltage ch4: drain current ch4: drain current
AN1523 application note 4/24 figure 3. vds @full load&vin max figure 4. piv @full load&vin max vin = 265 vrms - 50 hz vin = 265 vrms - 50 hz ch1: v pin1 drain voltage ch3: +5v diode: anode voltage ch4: +12v diode: anode voltage figure 5. l6590 signals @full load figure 6. l6590 signals @full load vin = 115 vrms - 50 hz vin = 220 vrms - 50 hz ch1: v pin1 drain voltage ch1: v pin1 drain voltage ch2: v pin4 comp ch2: v pin4 comp ch3: v pin3 vcc ch3: v pin3 vcc
5/24 AN1523 application note output voltage measurement and efficiency calculation @normal operation in the following table the output voltage cross regulation is measured and the overall efficiency of the converter is calculated at both the nominal input voltages. the output voltages have been measured after the load con- nector. the output voltages are within the tolerances in all conditions, at both full and half load. the efficiency calculated is good for this kind of converters, then the power dissipation is low and even this affect positively the long-term reliability of the circuit. output voltage measurement and efficiency calculation @stand-by operation like in the previous section, the output voltage and the efficiency have been checked and the input power has been measured. it is clearly visible that with the required stand-by load (5v@50ma and 12v@0ma) the input power consumption is well below 1w at both the input voltage range. besides, the circuit has been characterised at both the nominal input voltage values for different output load, giving very interesting results: 5v 12v 115vac pout tot vout @iout vout @iout pin h [v] [a] [v] [a] [w] [w] full load 4.99 1.400 12.11 0.304 10.67 15.12 70.6% half load 5.01 0.650 11.97 0.15 5.05 7.00 72.2% 5v 12v 220vac pout tot vout @iout vout @iout pin h [v] [a] [v] [a] [w] [w] full load 4.99 1.400 12.11 0.304 10.67 14.90 71.6% half load 5.01 0.650 11.99 0.15 5.05 6.90 73.3% 5v 12v 115vac pout tot vout @iout vout @iout pin h [v] [ma] [v] [ma] [w] [w] 5.02 10 11.92 0 0.050 0.288 17.4% 5.02 30 12.35 0 0.151 0.430 35.0% 5.02 50 12.65 0 0.251 0.579 43.3% 5.02 80 13.06 0 0.402 0.795 50.5% 5.02 100 13.27 0 0.502 0.941 53.4%
AN1523 application note 6/24 the circuit efficiency is always high and the input power is lower than 1w with twice the specified stand- by load. in figure 7 the input power as a function of the 5v current, without load on the 12v is represented. the only shortcoming is the 12v variation: the 12v increases above its limit when the +5v current exceeds 50ma, due to coupling between the transformer windings. a bit heavier bleeder on the 12v solves this problem very easily. decreasing the r8 to 1.2k w or providing for the same residual load, brings the mains power consump- tion to 1.06w @220vac delivering 5v@100ma, or to 0.69w@220vac delivering 5v@50ma. at the oppo- site, accepting an higher voltage variation of the 12v, it decreases the input power significantly: increasing r8 to 10k w when delivering 5 v@100ma, decrease the consumption to 0.935w@220vac. hence, a compro- mise between the bleeder resistors and the residual loads can be easily found giving the best results in stand- by. in fact, if a stable load is present on the 5v and we remove the 5v bleeder (r8), delivering 5v@100ma the consumption becomes 0.886w@220vac. in figure 8 there are the waveforms relevant to the l6590 during standby operation: it is easy to recognize that the switching frequency has decreased from the initial value to about 22khz. this feature is very important to 5v 12v 220vac pout tot vout @iout vout @iout pin h [v] [ma] [v] [ma] [w] [w] 5.02 10 11.95 0 0.050 0.330 15.2% 5.02 30 12.34 0 0.151 0.474 31.8% 5.02 50 12.66 0 0.251 0.627 40.0% 5.02 80 13.06 0 0.402 0.842 47.7% 5.02 100 13.28 0 0.502 0.986 50.9% figure 7. input power @stand-by figure 8. l6590 signals @ i+5v=50ma-i+12v=0 i +5v =50ma - i +12v =0 vin = 220 vrms - 50 hz ch1: vpin1 drain voltage ch2: vpin4 - comp ch3: vpin3 - vcc input power @low load 0.000 0.100 0.200 0.300 0.400 0.500 0.600 0.700 0.800 0.900 1.000 1.100 10 30 50 80 100 iout +5 v pin [w] pin @220vac [w] pin @115vac [w]
7/24 AN1523 application note decrease the switching losses during light load operation, thus improving the stand-by efficiency. for reference, also the vcomp and the vcc are captured. in detail, the vcc shows that there is still margin when working at light load respect to the vccoff value (which is 6.5v typ. and 7vmax.). this guarantees that even with a different transformer batch, delivering may be a bit lower vcc, the converter will still work correctly, without showing any irregular behaviour at start-up or inopportune missing start-up due to a vcc too low, unable to power correctly the primary controller. output voltage ripple @full load in figure 9 the output voltage ripple at switching frequency have been measured. as per the previous measures, the probes have been connected on test points after the output connector. the ripple and the spikes are very low making this design suitable to power sensitive loads. in figure 10, the residual ripple on the output voltages at mains frequency is measured. the low frequency residual ripple compared with the 100hz undulation across c1 (input elcap), demonstrates an excellent rejection of the circuit (~66db) at 115v. obviously the low frequen- cy rejection becomes even higher when the circuit is working at 220vac (figure 10). at that voltage, the rejection becomes 76db and this means a residual line ripple on the 5v output of 3mv only. figure 9. hf ripple figure 10. line ripple rejection vin = 115 vrms - 50 hz @full load vin = 115 vrms - 50 hz @full load ref1: v ripple +5v ch1: v c1+ ch3: v ripple +12v ch2: +12v out ch3: +5v out
AN1523 application note 8/24 dynamic load tests the pictures 11 and 12 show the output voltage regulation against a dynamic load variation of +5v output, at the nominal mains voltage values. as shown in the pictures, the voltage variation is always better than 1% and the response is fast, within 2 ms. this allows to power m p or any logic circuitry without the risk of inopportune reset or logic malfunctioning. even the 12v variation is good, remaining within its tolerance with still margin. start-up behaviours @full load in figure 13 and 14 there are the rising slopes at full load of the output voltages at nominal input mains voltages. as shown in the pictures, the rising time at 220vac is a bit faster than at 115vac, however they are similar. the rising slopes are always monotonic overall the input mains range. this characteristic is quite important power- ing a m p and its peripherals as in this case, thus avoiding problem at start-up for the equipment. in figure 15, there are the same waveforms captured during the start-up in stand-by. even in this case, the be- haviour of the circuit is always correct overall the input mains range. a slight overshoot is present in all conditions but it is negligible because the voltage remains always under con- trol and the variation is within the tolerances. load condition: +12v: full load +5v: load 50% 100%, 12hz figure 11. dynamic load test figure 12. dynamic load test vin = 115 vrms - 50 hz @full load vin = 220 vrms - 50 hz @full load ch1: v c1+ ch1: v c1+ ch3: +5v out ch3: +5v out ch4: +5i out ch4: +5i out
9/24 AN1523 application note figure 13. start-up behaviour figure 14. start-up behaviour vin = 115 vrms - 50 hz @full load vin = 220 vrms - 50 hz @full load ch3: +5v out ch3: +5v out ch4: +12v out ch4: +12v out wake-up time in the following picture (figure 16), there are the waveforms with the wake-up time measured at 115v input mains. thanks to the l6590 internal current source, the capacitor c2 is charged with a constant current, independent from the input mains value. this means that the power supply wake-up time is perfect- ly constant. thus, the annoying problem of a very long start-up time, especially at low mains, is solved without adding any additional extra component. be- sides, it is a key feature during stand-by operation be- cause it is disconnected from the mains helping a lot the power consumption decreasing. the measured time in figure 16 at 115vac is less than 150ms but it doesn't show variations from 88 to 265 vac. the traces shown in figure 16 are the drain voltage, the vcc and the +5v output: on the picture is clearly visible that no overshoots, undershoots, dips or any lost of control happens during the power supply start- up phase and the circuit starts correctly overall the in- put mains range figure 15. start-up behaviour vin = 115 vrms - 50 hz @stand-by ch3: +5v out ch4: +12v out
AN1523 application note 10/24 turn-off even at turn off the transition is clean, without any ab- normal behaviour like overshoots or glitches both on the output voltages. checking the full load condition, a restart attempt is present on the vcc voltage: it is due to the circuit q1, q2,r9, r10, r11, c6 connect- ed to the comp pin. during the switching off phase the energy in the bulk capacitor is no more refreshed, then the voltage on it starts to decrease. this pro- vides for an increasing of the comp pin voltage due to the loop intervention which is regulating the output voltage while the input voltage is decreasing. at a certain value the comp voltage is able to switch on q1 and then q2, thus disconnecting the transformer from vcc, so that the l6590 stops the operation. be- cause the circuit is switched off externally, the bulk capacitor has still some energy stored and when the vcc has dropped below the vccoff the ic detects that residual input voltage higher than its drain start volt- age (vdsmin). hence the l6590 reactivates the inter- nal current source like in a normal start-up, and the voltage on the vcc pin tends to increase again. but checking the fig. 17 it is important to note that the vcc value is far from the start threshold voltage (vc- con), then no any perturbation appears on the output, avoiding any problem.. figure 16. wake up time vin = 115 vrms - 50 hz @full load ch1: v pin1 - drain voltage ch2: v pin3 -vcc ch3: +5v out figure 17. turn-off figure 18. turn-off vin = 115 vrms - 50 hz @full load vin = 115 vrms - 50 hz @stand-by ch1: v pin1 drain voltage ch1: v pin1 drain voltage ch2: v pin3 - vcc ch2: v pin3 -vcc ch3: +5v out ch3: +5v out
11/24 AN1523 application note short-circuit tests @ full load the short circuit tests have been done in two phases, making the test shorting by a power switch the output electrolytic capacitor or making the short by the active load option. this gives an idea about the circuit behaviour with a hard short (at very low impedance) or with a osofto short that could happen on the stb main board, having slightly higher impedance. all the tests have been done at maximum, nominal and minimum input voltage. for all conditions the drain voltage is always below the bv dss , while the mean value of the output current has a value close to the nominal one, thus preventing component melting for excessive dissipation in case of long term shorts. the auto-restart is correct at short removal in all conditions. figure 19. short on +5v figure 20. short on +5v vin = 88 vrms - 50 hz @full load vin = 265 vrms - 50 hz @full load ch1: v pin1 drain voltage ch1: v pin1 drain voltage ch2: v pin3 - vcc ch2: v pin3 -vcc ch4: i short circuit ch4: i shortcircuit figure 21. short on +12v figure 22. short on +12v vin = 88 vrms - 50 hz @full load vin = 265 vrms - 50 hz @full load ch1: v pin1 drain voltage ch1: v pin1 drain voltage ch2: v pin3 - vcc ch2: v pin3 -vcc ch4: i short circuit ch4: i shortcircuit
AN1523 application note 12/24 as clearly indicated by the waveforms, the circuit starts to work in hiccup mode, keeping the current mean value of the shorted output at levels within component rating. because the working time and the dead time are im- posed by the charging and discharging time of the auxiliary capacitor c2, it is almost constant varying the input mains voltage thanks to the internal start-up current source already mentioned. short-circuit tests @ stand-by a short circuit when the smps works at light-load is always a critical fault condition for any power supply circuit. in this condition, the energy deliverable to the short is the maximum one, and then it is the most stressing situ- ation for the output rectifiers and besides, sometimes the primary hiccup mode is not triggered. this may hap- pen because the short circuit reflected impedance on the auxiliary winding it is not low enough for decreasing the vcc voltage below the under-voltage lockout threshold or spikes are present at turn off on the auxiliary wind- ing which are capable of powering the ic. the proposed circuit, even in this load condition, provides the same results as the previous tests, both at 115vac and at 220 vac, making it reliable in all the working situations independently from the transformer coupling. figure 23. short on +5v figure 24. short on +5v vin = 88 vrms - 50 hz @stand-by vin = 265 vrms - 50 hz @stand-by ch1: v pin1 drain voltage ch1: v pin1 drain voltage ch2: v pin3 - vcc ch2: v pin3 -vcc ch4: i short circuit ch4: i shortcircuit
13/24 AN1523 application note short circuit of the output rectifiers another frequent problem in a power supply is rele- vant to the protection of the smps itself: thus some- times it is easy to find circuits with a good protection capability against shorts of the load but which are not able to survive in case of a very hard short like an out- put electrolytic capacitor or a diode. besides, in case of a rectifier shorted, the equivalent circuit of the ba- sic converter changes: in fact, due to the missing (shorted) rectifier the energy stored is delivered even during the on time, like in forward mode with reverse polarity of the trafo. to insure reliable operation of the circuit, even this fault condition has been simulat- ed (figure 25) shorting each rectifier, then has been proven that the circuit can withstand this failure with- out any performance degradation. the circuit in fact works in hic-cup mode and then it restarts correctly to deliver the output voltages if the short is removed. this exceeds the requirements of the vde and iec safety rules, and ensures a considerable time saving during the qualification phase of the smps, avoiding failures during the qualification tests, retrofit and new testing, sometimes with a short time available to solve the issue. figure 25. short on +5v rectifier vin = 220 vrms - 50 hz @full load ch1: v pin1 - drain voltage ch2: v pin3 -vcc switch on and turn off in short circuit condition the following pictures show the smps behaviour during the start-up phase with an output voltage shorted. as clearly visible the circuit starts correctly then it works in hiccup mode protecting itself. the start-up phase is clean in all conditions, without showing any dangerous transition for the smps circuitry. figure 26. switch on with +5v shorted figure 27. switch on with +5v shorted vin = 88 vrms - 50 hz @full load vin = 265 vrms - 50 hz @stand-by ch1: v pin1 drain voltage ch1: v pin1 drain voltage ch2: v pin3 - vcc ch2: v pin3 -vcc ch3: +5vout ch3: +5vout
AN1523 application note 14/24 even at turn off in short circuit the smps functioning is good, protecting properly the circuit. no any abnormal transition or level has been observed during the tests, confirming the design robustness proven so far. over voltage protection a dangerous fault that could happen is the failure of the feedback circuitry. if this occurs, the smps output volt- ages can get to very high values, depending on the load on each output and on the transformer coupling be- tween the windings. consequently, the rectifiers and the output capacitors are overstressed or damaged. a possible solution could be to oversize the components but this should be expensive and uneconomic. hence, to avoid this smps failure a suitable protection circuit has been added inside the l6590 and it doesn't require any external component for the threshold setting. hence, this fail has been simulated opening the feedback loop and the circuit has been tested, giving the results shown in figures 30 and 31: figure 28. turn-off with +5v shorted figure 29. turn-off with +5v shorted vin = 88 vrms - 50 hz @full load vin = 265 vrms - 50 hz @stand-by ch1: v pin1 drain voltage ch1: v pin1 drain voltage ch2: v pin3 - vcc ch2: v pin3 -vcc ch3: +5vout ch3: +5vout figure 30. open loop figure 31. open loop vin = 88 vrms - 50 hz @full load vin = 265 vrms - 50 hz @full load ch1: v pin1 drain voltage ch1: v pin1 drain voltage ch2: v pin3 - vcc ch2: v pin3 -vcc ch3: +5vout ch3: +5vout
15/24 AN1523 application note the figure 32 has been acquired testing the open loop protection when working in stand-by: as visible, even in this condition the circuit stops the switching cycles when the vcc reaches 16.5v and the value of the output voltages never overstress the output elec- trolytic capacitors. in case a lower ovp threshold is required, it is possi- ble to connect the inverting input of the e/a (vfb-pin 5) to ground via a resistor (e.g. 1k w ) and a zener be- tween the pin 5 and vcc. a small ceramic capacitor in parallel to the resistor could be required. in this case the ovp threshold will be v zener + 2.5v. figure 32. open loop vin = 220 vrms - 50 hz @stand-by ch1: v pin1 - drain voltage ch2: v pin3 -vcc ch3: +5v out ch4: +12v out conducted noise measurements (pre-compliance test) the following pictures are shown the quasi-peak conducted noise measurements at full load and standby with both nominal input mains voltages. the limits shown on the diagrams are referred to the en55022 class b, which is the most widely used for domestic equipment like a tv or a stb. as visible on the diagrams, there is a good margin of the measures with respect to the limits in overall conditions. figure 33. quasi-peak measure figure 34. quasi-peak measure vin = 115 vrms - 50 hz @full load limits: en55022 class b vin = 220 vrms - 50 hz @ full load limits: en55022 class b
AN1523 application note 16/24 thermal measures in order to check the reliability of the design, a thermal mapping by means of an ir camera has been done. here below the thermal measures on the board at both nominal input mains voltage at ambient temperature (25 c) are shown. the pointers a d have been placed across some key components affecting the reliability of the circuit. the points correspond to the following components: as shown on the maps, all the other points of the board are within the temperature limits ensuring a reliable performance of the devices. t amb =25 c for all measures figure 35. quasi-peak measure figure 36. quasi-peak measure vin = 115 vrms - 50 hz @stand-by limits: en55022 class b vin = 220 vrms - 50 hz @stand-by limits: en55022 class b tested point notes a ic1 - l6590 copper dissipating area: 4 cm 2 b d1 - bzw06188 lead length: 13mm each side diode mounted 7mm from the top of pcb surface c t1 - trafo checked the hottest point d d4 byw98-200 lead length: 8 mm each side diode body placed on pcb surface figure 37. temperature ir measure figure 38. temperature ir measure vin = 115 vrms - 50 hz @full load vin = 220 vrms - 50 hz @full load
17/24 AN1523 application note conclusions a smps for consumer application has been completely designed and tested, checking the performance thor- oughly. the test results has been positive and the initial requirements of high reliability, low cost and low com- plexity have been met successfully. references [1] an1261 - getting familiar with the l6590 family high-voltage fully integrated power supply [2] an1262 - offline fly-back converters design methodology with the l6590 family annex1: part list designator part type description supplier 1 c1 22uf-400v elcap elna 2 c10 330pf cercap avx 3 c11 470uf-25v yxf elcap rubycon 4 c2 22uf-25v elcap elna 5 c3 2n2 cercap avx 6 c4 2n2-2kv (y1) cercap-safety cera-mite 7 c5 100n-250vac - b81133 x cap-mkt epcos 8 c6 2u2-50v - yk elcap rubycon 9 c7 1000uf-25v yxf elcap rubycon 10 c8 220uf-10v-zl elcap rubycon 11 c9 100nf cercap avx 12 d1 bzw06-188 axial transil diode stmicroelectronics 13 d2 stta106 ultra fast rec. rectifier stmicroelectronics 14 d3 1n4148 gen. purpose diode wishay 15 d4 byw98-200 fast rec. rectifier stmicroelectronics 16 d5 byw100-200 fast rec. rectifier stmicroelectronics 17 d6 df04g bridge rectifier gen. semicond. 18 f1 fuse1 t2a - 250v 19 ic1 l6590_minidip integrated controller stmicroelectronics 20 ic2 tl431acz shunt regulator stmicroelectronics 21 l1 b82731-r2501-a30 2*27mh filter coil epcos 22 l2 4.7uh elc08d inductor panasonic 23 opt1 pc817 optocoupler sharp 24 q1 bc548 small signal bjt zetex 25 q2 bc548 small signal bjt zetex 26 r1 12r - 1/4w - 5% sfr25 beyschlag 27 r10 33k - 1/4w - 5% sfr25 beyschlag 28 r11 10k - 1/4w - 5% sfr25 beyschlag 29 r12 ntc_10r s236 ntc thermistor epcos 30 r13 4k7 - 1/4w - 5% sfr25 beyschlag 31 r2 6k8 - 1/4w - 5% sfr25 beyschlag 32 r3 560r - 1/4w - 5% sfr25 beyschlag 33 r4 2k4 - 1/4w - 1% mba0204 beyschlag 34 r5 1k0 - 1/4w - 5% sfr25 beyschlag 35 r6 2k4 - 1/4w - 1% mba0204 beyschlag 36 r7 560r - 1/4w - 5% sfr25 beyschlag 37 r8 2k7 - 1/4w - 5% sfr25 beyschlag 38 r9 1k0 - 1/4w - 5% sfr25 beyschlag 39 t1 2362.0019 rev. c power transformer eldor corporation 40 pcb - single side - 70um - 100x50 mm
AN1523 application note 18/24 annex 2 - switch mode transformer specification evoluzione delle revisioni / revision evolution: documento n / document nbr: rev rev data date emesso da: issued by: verificato da: checked by: approvato da: approved by: pagine modificate: changed pages: descrizione modifica: change description: a 12/02/02 gl. verga switch mode transformer specification code : 2362.0019 c first issue date : 12/02/2002 table of contents: 1.0 general information 2.0 electrical characteristics 3.0 safety 4.0 material list 5.0 mechanical characteristics copia assegnata a: copy assigned to: eldor corporation s.p.a. via plinio, 10 22030 orsenigo - como - italy tel. +39 031 636111 - telefax +39 031 636263
19/24 AN1523 application note annex 2 - switch mode transformer specification (continued) switch mode transformer specification 2362.0019 c customer code issue a this document and its content are property of eldor corporation s.p.a. no part of this document may be reproduced, published, disclosed or used in any form with out written permission of eldor corporation s.p.a. doc.n. pag. 2 / 6 1.0 general information 1.1 description the magnetic circuit comprises two soft ferrite e-cores glued together and gapped on the central leg. the windings are placed concentrically on single plastic bobbin made in self extinguish material. the transformer comply with the standard (refer to pharagraf a3.0 safetyo) for the component connected to the mains because: the use of triple insulation wire (three different layers) for the secondary winding. the thickness of insulation that exceed 0.40 mm. the shape of coilformer that maintain the safety creeping distance from the core , that is consired belong the primary side, and the secondary output pins and the circuit components. winding outputs are made through 8 pins placed in two parallel rows (refer to page 6). 1.2 application the transformer is designed for use in a switch mode flyback power supply. 1.2.1 operating conditions operating ambient temperature: 0 c to +60 c operating humidity range non condensing 10% to 85%rh ambient temperature is the medium value measured at 30 mm. of distance from the surface of the transformer. when the transformer is placed inside a metallic shield the above temperature value will be referred to the inside of the shield even if it is closer then 30 mm to the smt. 1.3 storage conditions storage temperature -20 c to +50 c after storage to allow a minimum of 24 hours recovery time before testing. 1.4 marking the component is marked with: - eldor part number and customer part number (if required). - production date. 1.5 packaging tdb 1.6 weight the transformer weight is approx 15 g.
AN1523 application note 20/24 annex 2 - switch mode transformer specification (continued) switch mode transformer specification 2362.0019 c customer code issue a this document and its content are property of eldor corporation s.p.a. no part of this document may be reproduced, published, disclosed or used in any form with out written permission of eldor corporation s.p.a. doc.n. pag. 3 / 6 2.0 electrical characteristics for pins identifi cation refer to mechanical drawing 2.1 static characteristics 2.1.1 inductance and dc resistance: measurement of inductance is made using a lcr bridge at frequency of 10khz at output voltage of 1 v r.m.s. measurement of resistance is made using a four wire ohmmeter. temperature should be 23 2 c. l(mh) tol(%) r( w ) tol(%) between pin 2 and pin 1 2.0 10 2.31 15 2.1.2 leakage inductance: l l = 6 %lp (pin 2 pin 1 ) measurement is made with the secondary windings short circuited. measurement if inductance is made using a lcr bridge at frequency of 10 khz and at output voltage of 1 v r.m.s. 2.1.3 withstanding voltage the transformer shall withstand a voltage of 3.75 kv rms for 60 seconds between primary winding and secondary windings. the frequency of the test voltage shall be 50 or 60hz. 2.2 test circuit diagram and application conditions +5v/1.4a +12v/0.3a 1 4 5 7 6 8 2 3 +v drain supply ic
21/24 AN1523 application note annex 2 - switch mode transformer specification (continued) switch mode transformer specification 2362.0019 c customer code issue a this document and its content are property of eldor corporation s.p.a. no part of this document may be reproduced, published, disclosed or used in any form with out written permission of eldor corporation s.p.a. doc.n. pag. 4 / 6 2.3 temperatures 2.3.1 temperature raise of the primary coil the raising in primary winding shall be made in the following condition: vin nom. and all loads at maximum current, except that for the audio output that must be adjusted at 50% imax. raise of temperature after 4 hours must be lower than 55 c 2.3.2 maximum allowable temperatures in the application, tv set with cabinet closed, at the maximum allowable ambient temperature (see iec68-1 clause 4.6.2) and at the maximum working conditions (see 2.3.1) after 4 hours the temperature of the transformer must be = 115 c. to satisfy the above conditions it is raccomanded to provide the smt with sufficient cool air flow around it. 2.4 core saturation test must be performed in the following way: a) the smt must be placed in oven at ambient temperature of 100 c for 2 hours. b) using the circuit as per figure, connect the primary winding to lcr meter operating at frequency of 1 khz and output voltage of 1 v. c) superimpose through the power supply a dc current and read on the lcr meter the correspondent value of the inductance. do this up to a current value of i peak max input current. d) the value of the inductance must not shows saturation (0.7lp). a choke (1h or more) specimen c (40000 m f or more) lcr meter + saturation current @100 c 0,50 0,60 0,70 0,80 0,90 1,00 1,10 0 0,15 0,3 0,45 0,6 0,75 0,9 i (a) lx/lp
AN1523 application note 22/24 annex 2 - switch mode transformer specification (continued) switch mode transformer specification 2362.0019 c customer code issue a this document and its content are property of eldor corporation s.p.a. no part of this document may be reproduced, published, disclosed or used in any form with out written permission of eldor corporation s.p.a. doc.n. pag. 5 / 6 3.0 safety according to international standard en60065- en60950 for the class ii at the following conditions of primary voltage: v rms <300v; vp<600v all the transformers are tested at the end of the manufacturing lines for the withstanding voltage in between primary and secondary in the following conditi ons: test voltage = 4.2 kv rms duration of test = 1 seconds file records of the test are mantained in eldor quality assurance dept. 4.0 material list nr. smt part name kind of material manufacturer trade mark/type ul rating ul file number 1 bobbin polyamide 4/6 (pa4/6) dsm stanyl te250f6 94v-0 e119177 2 insulating tape polyester film 3m 1350 ul 130 c e17385 3 terminal pins tinned steel 4 ferrite core n67 or equivalent epcos ag, avx, samwha, ferroxcube, isu, dmeg,tridelta or equivalent e20/10/6 5 primary windings enamelled wire grade 2 - class f elektrisola atesina srl, nexans pirelli cavi e sistemi or equivalent 6 secondary windings triple insulated wire the furukawa electric tex-e e206440 7 adhesive loctite loctite 480 8 elastic adhesive 3m scotch grip ec -1022 9 marking or label marking 1 5 6 4 2 7 8
23/24 AN1523 application note annex 2 - switch mode transformer specification (continued) switch mode transformer specification 2362.0019 c customer code issue a this document and its content are property of eldor corporation s.p.a. no part of this document may be reproduced, published, disclosed or used in any form with out written permission of eldor corporation s.p.a. doc.n. pag. 6 / 6 all dimensions in mm general tolerance 0.2 5.0 mechanical drawings holes pattern component side referencemark for pins identification = = = = == == == == 7.5 0.1 5 0.1 16.25 0.1 7.5 0.1 5 0.1 17.5 20 +0.8 -0.6 5.9 0 -0.5 1 0. 1 16.25 0.1 19 0.1 4.5 0.5 6.8 9.45 5 7.5 17.5 1.3 +0.1 0 n 8 holes 0.1 0.1 == 14.1 +0.8 0 25.5 0.1 22.4 0.1 = = 4 3 2 1 5 6 7 8 1 1 4 8 5
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan -malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http:/ /www.st.com 24/24 AN1523 application note

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